Assessments - 4, GPA: 4
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. . DV Head No. /LBA [MSB] 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2H(SC) 1F1H(ER) xx xx 01H (*1) 01H Diagnostic code *1 This register indicates X’00’ in the LBA mode. (17) READ LONG (X’22’ or X’23’) This command operates similarly to the READ SECTOR(S) command except that the device transfers the data in the requested sector and the ECC bytes to the host system. The ECC error correction is not performed for this command. This C141-E050-02EN 5-43 Interface command is used for checking ECC function by combining with the WRITE LONG command. Number of ECC bytes to be transferred is fixed to 4 bytes and cannot be changed by the SET FEATURES command. The READ LONG command supports only single sector operation. At command issuance (I/O registers setting contents) 1F7H(CM) 0 0 1 0 0 0 1 R 1F6H(DH) . L . DV Head No. /LBA [MSB] 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2H(SC) 1F1H(FR) Cylinder No. [MSB] / LBA Cylinder No. [LSB] / LBA Sector No. / LBA [LSB] 01 xx R = 0 ®with Retry R = 1 ®without Retry At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) . L . DV Head No. /LBA [MSB] 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2H(SC) 1F1H(ER) Cylinder No. [MSB] / LBA Cylinder No. [LSB] / LBA Sector No. / LBA [LSB] 00 (*1) Error information *1 If the command is terminated due to an error, this register indicates 01. (18) WRITE LONG (X’32’ or X’33’) This command operates similarly to the READ SECTOR(S) command except that the device writes the data and the ECC bytes transferred from the host system to the disk medium. The device does not generate ECC bytes by itself. The WRITE LONG command supports only single sector operation. The number of ECC bytes to be transferred is fixed to 4 bytes and can not be changed by the SET FEATURES command. 5-44 C141-E050-02EN 5.3 Host Commands This command is operated under the following conditions: • The command is issued in a sequence of the READ LONG or WRITE LONG (to the same address) command issuance. (WRITE LONG command can be continuously issued after the READ LONG command.) If above condition is not satisfied, the command operation is not guaranteed. At command issuance (I/O registers setting contents) 1F7H(CM) 0 0 1 1 0 0 1 R 1F6H(DH) . L . DV Head No. /LBA [MSB] 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2H(SC) 1F1H(FR) Cylinder No. [MSB] / LBA Cylinder No. [LSB] / LBA Sector No. / LBA [LSB] 01 xx R = 0 ®with Retry R = 1 ®without Retry At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) . L . DV Head No. /LBA [MSB] 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2H(SC) 1F1H(ER) Cylinder No. [MSB] / LBA Cylinder No. [LSB] / LBA Sector No. / LBA [LSB] 00 (*1) Error information *1 If the command is terminated due to an error, this register indicates 01. (19) READ BUFFER (X’E4’) The host system can read the current contents of the sector buffer of the device by issuing this command. Upon receipt of this command, the device sets the BSY bit of Status register and sets up the sector buffer for a read operation. Then the device sets the DRQ bit of Status register, clears the BSY bit, and generates an interrupt. After that, the host system can read up to 512 bytes of data from the buffer. C141-E050-02EN 5-45 Interface At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 1 1 0 1 0 0 1F6H(DH) . . . DV xx 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2H(SC) 1F1H(FR) xx xx xx xx xx At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) . . . DV xx 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2H(SC) 1F1H(ER) xx xx xx xx Error information (20) WRITE BUFFER (X’E8’) The host system can overwrite the contents of the sector buffer of the device with a desired data pattern by issuing this command. Upon receipt of this command, the device sets the BSY bit of the Status register. Then the device sets the DRQ bit of Status register and clears the BSY bit when the device is ready to receive the data. After that, 512 bytes of data is transferred from the host and the device writes the data to the sector buffer, then generates an interrupt. 5-46 C141-E050-02EN 5.3 Host Commands At command issuance (I/O registers setting contents) 1F7H(CM) 1 1 1 1 1 0 0 0 1F6H(DH) . . . DV xx 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2H(SC) 1F1H(FR) xx xx xx xx xx At command completion (I/O registers contents to be read) 1F7H(ST) Status information 1F6H(DH) . . . DV xx 1F5H(CH) 1F4H(CL) 1F3H(SN) 1F2H(SC) 1F1H(ER) xx xx xx xx Error information (21) IDLE (X’97’ or X’E3’) Upon receipt of this command, the device sets the BSY bit of the Status register, and enters the idle mode. Then, the device clears the BSY bit, and generates an interrupt. The device generates an interrupt even if the device has not fully entered the idle mode. If the spindle of the device is already rotating, the spin-up sequence shall not be implemented. By using this command, the automatic power-down function is enabled and the timer immediately starts the countdown. When the timer reaches the specified value, the device enters sta...
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