Assessments - 5, GPA: 3.6
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P u ll-u p Freq. Phase Modulating VCO Post CLKOUT Detector Charge Pump Waveform Dividers Divider Feedback Divider PLL GND VDD . M N Clock Input (SSCG Output) REFOUT Logic Control SDATA SCLOCK PWRDWN# Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 Document #: 38-07531 Rev. ** Revised March 18, 2003 [+] Feedback CY25822-2 Pin Description Pin No. Pin Name Pin Type Pin Description 1 CLKIN Input 48-MHz or 66-MHz Clock Input. 2 VDD Power Power Supply for PLL and Outputs. 3 GND Ground Ground for Outputs. 4 CLKOUT Output 48-MHz or 66-MHz Spread Spectrum Clock Output. 5 REFOUT Output Non-spread Spectrum Reference Clock Output. 6 SDATA I/O I2C-compatible SDATA. 7 SCLOCK Input I2C-compatible SCLOCK. 8 PWRDWN# Output LVTTL Input for PowerDown# Active Low. Serial Data Interface To enhance the flexibility and function of the clock synthesizer, a two-signal serial interface is provided. Through the Serial Data Interface, various device functions such as individual clock output buffers, etc., can be individually enabled or disabled. The registers associated with the Serial Data Interface initializes to their default setting upon power-up, and therefore use of this interface is optional. Clock device register changes are normally made upon system initialization, if any are required. The interface can also be used during system operation for power management functions. Table 1. Command Code Definition Table 2. Block Read and Block Write Protocol Data Protocol The clock driver serial protocol accepts byte write, byte read, block write, and block read operation from the controller. For block write/read operation, the bytes must be accessed in sequential order from lowest to highest byte (most significant bit first) with the ability to stop after any complete byte has been transferred. For byte write and byte read operations, the system controller can access individual indexed bytes. The offset of the indexed byte is encoded in the command code, as described in Table 1. The block write and block read protocol is outlined in Table 2 while Table 3 outlines the corresponding byte write and byte read protocol.The slave receiver address is 11010100 (D4h). Bit Description 7 0 = Block read or block write operation 1 = Byte read or byte write operation (6:0) Byte offset for byte read or byte write operation. For block read or block write operations, these bits should be ’0000000’ Block Write Protocol Block Read Protocol Bit Description Bit Description 1 Start 1 Start 2:8 Slave address – 7 bits 2:8 Slave address – 7 bits 9 Write = 0 9 Write = 0 10 Acknowledge from slave 10 Acknowledge from slave 11:18 Command Code – 8 bits '00000000' stands for block operation 11:18 Command Code – 8 bits '00000000' stands for block operation 19 Acknowledge from slave 19 Acknowledge from slave 20:27 Byte Count – 8 bits 20 Repeat start 28 Acknowledge from slave 21:27 Slave address – 7 bits 29:36 Data byte 1 – 8 bits 28 Read = 1 37 Acknowledge from slave 29 Acknowledge from slave 38:45 Data byte 2 – 8 bits 30:37 Byte count from slave – 8 bits 46 Acknowledge from slave 38 Acknowledge .... ...................... 39:46 Data byte from slave – 8 bits .... Data Byte (N–1) –8 bits 47 Acknowledge .... Acknowledge from slave 48:55 Data byte from slave – 8 bits Document #: 38-07531 Rev. ** Page 2 of 9 [+] Feedback CY25822-2 Table 2. Block Read and Block Write Protocol (continued) .... Data Byte N –8 bits 56 Acknowledge .... Acknowledge from slave .... Data bytes from slave/Acknowledge .... Stop .... Data byte N from slave – 8 bits .... Not Acknowledge .... Stop Table 3. Byte Read and Byte Write Protocol Byte Write Protocol Byte Read Protocol Bit Description Bit Description 1 Start 1 Start 2:8 Slave address – 7 bits 2:8 Slave address – 7 bits 9 Write = 0 9 Write = 0 10 Acknowledge from slave 10 Acknowledge from slave 11:18 Command Code – 8 bits '1xxxxxxx' stands for byte operation, bits[6:0] of the command code represents the offset of the byte to be accessed 11:18 Command Code – 8 bits '1xxxxxxx' stands for byte operation, bits[6:0] of the command code represents the offset of the byte to be accessed 19 Acknowledge from slave 19 Acknowledge from slave 20:27 Data byte from master – 8 bits 20 Repeat start 28 Acknowledge from slave 21:27 Slave address – 7 bits 29 Stop 28 Read = 1 29 Acknowledge from slave 30:37 Data byte from slave – 8 bits 38 Not Acknowledge 39 Stop Byte 0: Control Register Bit @Pup Pin# Name Pin Description 7 1 4 SS0 – 6 0 4 SS1 – 5 0 4 SS2 – 4 0 4 SS3 – 3 1 Not Applicable Reserved, must be written as 1 2 1 4, 5 CLKOUT, REFOUT Power-down three-state enable 0 = three-state outputs, 1 = drive outputs low (Applies only in Power Down State) 1 1 4 CLKOUT Spread Spectrum enable 0 = spread off, 1 = spread on 0 0 Not Applicable No Pins Table 4. Spread Spectrum Select SS3 SS2 SS1 SS0 Spread Mode Spread Amount% 0 0 0 0 Down 0.8 0 0 0 1 Down 1.0 0 0 1 0 Down 1.25 0 0 1 1 Down 1.5 0 1 0 0 Down 1.75 Document #: 38-...