Instruções de Operação HP, Modelo HP NonStop G-Series

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Glossary
TNS instructions
TNS instructions. Stack-oriented, 16-bit machine instructions that are directly executed on
TNS systems by hardware and microcode. TNS instructions can be emulated on
TNS/R systems by using millicode, an interpreter, and either translation or
acceleration. Compare to MIPS RISC instructions.
TNS interpreted mode. A TNS emulation environment on a TNS/R system in which
individual TNS instructions in a TNS object file are directly executed by interpretation
rather than permanently translated into MIPS or Intel® Itanium® instructions. TNS
interpreted mode runs slower than TNS accelerated mode. Each TNS instruction is
decoded each time it is executed, and no optimizations between TNS instructions are
possible. TNS interpreted mode is used when a TNS object file has not been
accelerated for that hardware system, and it is also sometimes used for brief periods
within accelerated object files. Accelerated or interpreted TNS object code cannot be
mixed with or called by native mode object code. Compare to TNS accelerated mode
and TNS/R native mode.
TNS mode. The operational environment in which unaccelerated TNS instructions execute.
Compare to TNS accelerated mode and native mode.
TNS process. A process whose main program object file is a TNS object file, compiled
using a TNS compiler. A TNS process executes in interpreted or accelerated mode
while within itself, when calling a user library, or when calling into TNS system libraries.
A TNS process temporarily executes in native mode when calling into native-compiled
parts of the system library. Object files within a TNS process might be accelerated or
not, with automatic switching between accelerated and interpreted modes on calls and
returns between those parts. Compare to TNS/R native process.
TNS user library. A user library available to TNS processes in the Guardian environment.
TNS/R. Fault-tolerant HP computers that support the HP NonStop operating system and are
based on 32-bit reduced instruction-set computing (RISC) technology. TNS/R systems
run the MIPS-1 RISC instruction set and can run TNS object files by interpretation or
after acceleration. TNS/R systems include all HP systems that use NSR-x processors.
Compare to TNS.
TNS/R native C compiler. The HP C compiler that generates TNS/R object files. Compare
to TNS C compiler.
TNS/R native mode. The primary execution environment on a TNS/R system, in which
native-compiled MIPS object code executes, following TNS/R native-mode compiler
conventions for data locations, addressing, stack frames, registers, and call linkage.
Compare to TNS interpreted mode a nd TNS accelerated mode.
TNS/R native object code. The RISC instructions that result from processing program
source code with a TNS/R native compiler. TNS/R native object code is optimized to
fully exploit the performance of the RISC architecture. TNS/R native object code
executes only on TNS/R systems, not on TNS systems.
noft Manual— 528273-001
Glossary -7

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